1. Field of the Disclosure
The present disclosure relates generally to electronic devices and more specifically to the design of electronic devices.
2. Description of the Related Art
Reduction of power consumption in electronic devices, such as integrated circuit devices formed at a common semiconductor substrate, is desirable, especially for devices targeted for low-power applications, such as battery-powered applications. Therefore, it is desirable to focus on portions of a design that consume relatively high amounts of power, as compared to other portions of the design, to reduce the overall power consumption of the device by further optimizing their design or layout characteristics. Prior techniques of determining the amount of power consumed by a portion of a device, to determine if it should be focused upon for further power reduction, have included estimating the amount of power consumed by each of these portions. Such power estimations can be dynamically determined or statically determined. For example, power consumption at a specific portion of a design has been estimated by simulating the device based upon known input vectors and determining the resultant power consumption.
The prior methods of estimating power consumption of various blocks can occur late in the design process of a device and be computationally intensive. Therefore, a method that would allow for determining which portions of a design should be optimized for power consumption early in the design process, or that is less computationally intensive would be useful.